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Description
Datasheet the innovative FineLine BGATM packages (see Tables 2 and 3 ). . Additional design 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),. Table 3 lists the device name, package type, and number of pins for the Stratix II device family. 1 The package type entries with Option # refer to instances SDADR7: Enable/Disable SCS[3:2] PCI BAR for address . MPP0/DMAReq*0 MPP1/DMAReq*1 MPP2/DMAReq*2 MPP3/DMAReq*3 EP1K30QC208 - 3 .
| Part Number | EP1K30QC2083N |
| Main Category | Integrated Circuits (ICs) |
| Sub Category | Embedded - FPGAs (Field Programmable Gate Array) |
| Brand | Altera |
| Description | IC FPGA 147 I/O 208QFP |
| Series | ACEX-1K |
| Number of LABs/CLBs | 216 |
| Number of Logic Elements/Cells | 1728 |
| Total RAM Bits | 24576 |
| Number of I/O | 147 |
| Number of Gates | 119000 |
| Voltage - Supply | 2.375 V ~ 2.625 V |
| Mounting Type | Surface Mount |
| Operating Temperature | 0°C ~ 70°C (TA) |
| Package / Case | 208-BFQFP |
| Supplier Device Package | 208-PQFP (28x28) |
| Image |  |
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